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SPI slave timing issue, need MISO to send data 6µs earlier
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Hello, as part of a larger long-term project of mine, I'm currently trying to mimic the behaviour of a Super Nintendo gamepad using the ESP32. After several attempts I ended up using the SPI slave driver. But there's one minor problem which I don't know how to fix.

So let me explain how the protocol works first: usually every 16.67ms, the console's CPU sends out a 12µs wide, positive going data latch pulse. This instructs the PISO shift-register in the gamepad to latch the state of all buttons internally. 6µs after the fall of the data latch pulse, the CPU sends out 16 data clock pulses. These are 50% duty cycle with 12µs per full cycle. The gamepads serially shift the latched button states out on every rising edge of the clock, and the CPU samples the data on every falling edge.

But because the clock is normally high, the first transition it makes after latch signal is a high-to-low transition. Since data for the first button will be latched on this transition, it's data must actually be driven earlier. The gamepads drive data for the first button at the falling edge of latch.

And that's the actual problem: I set up my program to use the console's clock as SCLK, the latch as CS and MISO to send out the data to the console. So 6µs after the fall of the data latch pulse, when the clock starts, MISO starts sending the data. This is – to my knowledge – correct SPI behaviour. But I need the data to be sent 6µs earlier.

Is there any way to accomplish this?

I even set up a small test project using PlatformIO and esp-idf which can be used to simulate/re-create the issue: https://github.com/mupfelofen-de/SNESoIP-SPI-problem-simulator

Any tipp, suggestion or alternate solution proposal is highly appreciated!

PS: CPOL and CPHA are set to mode 2 which is exactly what I need.

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5 years ago