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I am designing a mux board to mux a flashing setup. Both UART and SPI lines are on 1.8V logic. The Mux chips have ~4-8ohms on-resistance and 1.7pF on-capacitance. Few questions:
1) Would I need buffers on each stage to reduce/eliminate attenuation or are these parasitic effects small enough for my setup?
2) Can a back of the envelope help me calculate/determine this? or would I need LTSPICE/ORcad to simulate this and/or bench setup to sniff data lines?
3) does amplifying the signal to make parasitic effects negligible before going into the muxes and then shifting it down at output can also be a solution?
lmk if there are other online resources that will point me in the right direction too...
Thanks in advance!
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- 9 months ago
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